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Jon Cheek
Jon Cheek
TSMC
Electronic engineering
PMOS logic
NMOS logic
Geometry
MOSFET
2
Papers
3
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0
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Optimization of Dual-ESL Stressor Geometry Effects for High Performance 65nm SOI Transistors
2006
SOI | International SOI Conference
Xiangzheng Bo
Paul A. Grudowski
Vance H. Adams
Konstantin V. Loiko
Daniel Tekleab
Stan Filipiak
John J. Hackenberg
Venkat R. Kolagunta
Mark C. Foisy
Li-te Lin
K.H. Fung
Chi-Hsi Wu
Hsiao Chin Tuan
Jon Cheek
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Dual Substrate Orientation Integration for High Performance (110) PMOS
2006
Gauri V. Karve
White Ted
D. Eades
Mariam G. Sadaka
Greg Spencer
John J. Hackenberg
John Norbert
Tom Kropewnicki
Stefan Zollner
Pete Beckage
Jack Grant
R. Garcia
Bich-Yen Nguyen
Nigel Cave
Mark D. Hall
Jon Cheek
Suresh Venkatesan
C. T. Lin
I-Lu Wu
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Citations (2)
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