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E. Mejia-Motta
E. Mejia-Motta
CINVESTAV
Ground bounce
CMOS
Parasitic element
Equivalent series inductance
Inductance
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Design of CMOS buffers using the settling time of the ground bounce voltage as a key parameter
2000
MWCAS | Midwest Symposium on Circuits and Systems
E. Mejia-Motta
F. Sandoval-Ibarra
J. Santana
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