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Sanjay Ramnath
Sanjay Ramnath
Synopsys
Electronic engineering
Real-time computing
Design for testing
Design flow
Computer science
5
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97
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Minimizing the Impact of Scan Compression
2007
VTS | VLSI Test Symposium
Peter Wohl
John A. Waicukauski
Rohit Kapur
Sanjay Ramnath
Emil Gizdarski
Thomas W. Williams
P. Jaini
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Citations (41)
DFT MAX and Power
2007
Journal of Low Power Electronics
Rohit Kapur
T. Finklea
Felix Ng
Anshuman Chandra
Sanjay Ramnath
Peter Wohl
Thomas W. Williams
Ashok Anbalan
Sandeep S. Kulkarni
Tammy Fernandes
Pramod Notiyath
Rajesh Uppuluri
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Fully X-tolerant combinational scan compression
2007
ITC | International Test Conference
Peter Wohl
John A. Waicukauski
Sanjay Ramnath
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Citations (41)
Power and Design for Test: A Design Automation Perspective
2005
Journal of Low Power Electronics
Aurelia De Colle
Sanjay Ramnath
Mokhtar Hirech
Subramanian Chebiyam
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Citations (12)
Test-model based hierarchical DFT synthesis
2002
ICCAD | International Conference on Computer Aided Design
Sanjay Ramnath
Frederic Neuveux
Mokhtar Hirech
Felix Ng
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Citations (2)
1