(Invited) Atomic-Layer-Deposited High-k Dielectric Integration on Epitaxial Graphene

The scaling of silicon-based MOSFET technology beyond the 22 nm node is challenging. Further progress requires new channel materials such as Ge, III-V semiconductors, carbon nanotubes (CNTs) and graphene. Perfect top-gate dielectric stacks are needed in order to sustain their potential device performance for carbon nanoelectronics. Due to the inert nature of carbon surfaces of CNTs and graphene, the challenges and current work on ALD high-k/CNTs and graphene integration are reviewed. The research work performed at Purdue University on ALD high-k integration on epitaxial graphene on SiC is summarized.