Atomic-layer-deposition-assisted ZnO nanoparticles for oxide charge-trap memory thin-film transistors

2017 
ZnO nanoparticles (NPs) with monolayer structures were prepared by atomic layer deposition (ALD) to use for a charge-trap layer (CTL) for nonvolatile memory thin-film transistors (MTFTs). The optimum ALD temperature of the NP formation was demonstrated to be 160 °C. The size and areal density of the ZnO NPs was estimated to be approximately 33 nm and 4.8 × 109 cm−2, respectively, when the number of ALD cycles was controlled to be 20. The fabricated MTFTs using a ZnO-NP CTL exhibited typical memory window properties, which are generated by charge-trap/de-trap processes, in their transfer characteristics and the width of the memory window (MW) increased from 0.6 to 18.0 V when the number of ALD cycles increased from 5 to 30. The program characteristics of the MTFT were markedly enhanced by the post-annealing process performed at 180 °C in an oxygen ambient due to the improvements in the interface and bulk qualities of the ZnO NPs. The program/erase (P/E) speed was estimated to be 10 ms at P/E voltages of −14 and 17 V. The memory margin showed no degradation with the lapse in retention time for 2 × 104 s and after the repetitive P/E operations of 7 × 103 cycles.
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