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Masashi Matsumura
Masashi Matsumura
CAS latency
Parallel computing
Very-large-scale integration
Electronic engineering
Memory bandwidth
2
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6
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A 5.3-GB/s embedded SDRAM core with slight-boost scheme
1999
IEEE Journal of Solid-state Circuits
Akira Yamazaki
Tadato Yamagata
Makoto Hatakenaka
Atsushi Miyanishi
Isao Hayashi
Shigeki Tomishima
Atsuo Mangyo
Yoshio Yukinari
Takashi Tatsumi
Masashi Matsumura
Kazutami Arimoto
Michihiro Yamada
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Citations (4)
A 5.3 GB/s 32 Mb embedded SDRAM core with slightly boosting scheme
1998
VLSIC | Symposium on VLSI Circuits
Akira Yamazaki
Tadato Yamagata
Makoto Hatakenaka
Atsushi Miyanishi
Isamu Hayashi
Shigeki Tomishima
Atsuo Mangyo
Yoshio Yukinari
T. Tatsumi
Masashi Matsumura
K. Arimoto
Michihiro Yamada
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Citations (2)
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