Old Web
English
Sign In
Acemap
>
authorDetail
>
Makoto Hatakenaka
Makoto Hatakenaka
Electronic engineering
Embedded system
Dram
CAS latency
Parallel computing
5
Papers
6
Citations
0.00
KQI
Citation Trend
Filter By
Interval:
1900~2024
1900
2024
Author
Papers (5)
Sort By
Default
Most Recent
Most Early
Most Citation
No data
Journal
Conference
Others
A Low Power Embedded DRAM Macro for Battery-Operated LSIs
2003
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Takeshi Fujino
Akira Yamazaki
Yasuhiko Taito
Mitsuya Kinoshita
Fukashi Morishita
Teruhiko Amano
Masaru Haraguchi
Makoto Hatakenaka
Atsushi Amo
Atsushi Hachisuka
Kazutami Arimoto
Hideyuki Ozaki
Show All
Source
Cite
Save
Citations (0)
Verfahren zum Prüfen einer Halbleiter-Speichereinrichtung
2001
Atsuo Mangyo
Manabu Miura
Makoto Hatakenaka
Show All
Source
Cite
Save
Citations (0)
A 5.3-GB/s embedded SDRAM core with slight-boost scheme
1999
IEEE Journal of Solid-state Circuits
Akira Yamazaki
Tadato Yamagata
Makoto Hatakenaka
Atsushi Miyanishi
Isao Hayashi
Shigeki Tomishima
Atsuo Mangyo
Yoshio Yukinari
Takashi Tatsumi
Masashi Matsumura
Kazutami Arimoto
Michihiro Yamada
Show All
Source
Cite
Save
Citations (4)
A semiconductor integrated circuit device
1999
Makoto Hatakenaka
Shigeki Tomishima
Tadato Yamagata
Akira Yamazaki
Show All
Source
Cite
Save
Citations (0)
A 5.3 GB/s 32 Mb embedded SDRAM core with slightly boosting scheme
1998
VLSIC | Symposium on VLSI Circuits
Akira Yamazaki
Tadato Yamagata
Makoto Hatakenaka
Atsushi Miyanishi
Isamu Hayashi
Shigeki Tomishima
Atsuo Mangyo
Yoshio Yukinari
T. Tatsumi
Masashi Matsumura
K. Arimoto
Michihiro Yamada
Show All
Source
Cite
Save
Citations (2)
1