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F. Huang
F. Huang
IBM
Electronic engineering
CMOS
Dielectric
Engineering
Leakage (electronics)
3
Papers
17
Citations
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A 180 nm copper/low-k CMOS technology with dual gate oxide optimized for low power and low cost consumer wireless applications
2000
VLSIT | Symposium on VLSI Technology
G. Yeap
F Nkansah
J. Chen
S. Jallepalli
D. Pham
T. Lii
A. Nangia
P. Le
D. Hall
D. Menke
J. Sun
A. Das
Percy V. Gilbert
F. Huang
John L. Sturtevant
K. Green
J. Lu
J. Benavidas
E. Banks
J. Chung
Craig S. Lage
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Citations (2)
A highly versatile 0.18 /spl mu/m CMOS technology with dense embedded SRAM
2000
VLSIT | Symposium on VLSI Technology
Mousumi Bhat
S. Shi
P. Grudowski
C Feng
B. Lee
R. Nagabushnam
J. Moench
C. Gunderson
P. Schani
L. Day
S. Bishop
H. Tian
J. Chung
Craig S. Lage
J. Ellis
N. Herr
Percy V. Gilbert
A. Das
F Nkansah
M. Woo
Mark L. Wilson
D. Derr
L. Terpolilli
K. Weidemann
R. Stout
A. Hamilton
T. Lii
F. Huang
K. Cox
John D. Scott
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A high performance 1.5 V, 0.10 /spl mu/m gate length CMOS technology with scaled copper metallization
1998
IEDM | International Electron Devices Meeting
Percy V. Gilbert
I. Yang
C. Pettinato
M. Angyal
B. Boeck
C. Fu
T. VanGompel
R. Tiwari
T. Sparks
W. Clark
C. Dang
J. Mendonca
B. Chu
K. Lucas
M. Kling
B. Roman
E. Park
F. Huang
M. Woods
D. Rose
K. McGuffin
A Nghiem
E. Banks
T. McNelly
C Feng
John L. Sturtevant
H. de
A. Das
S. Veeraraghavan
F Nkansah
Mousumi Bhat
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Citations (13)
1