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Sipeng Gu
Sipeng Gu
GlobalFoundries
Electronic engineering
CMOS
Wafer
Engineering
Silicon
3
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12
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Wafer Level Variability Improvement by Spatial Source/Drain Activation and Ion Implantation Super Scan for FinFET Technology
2018
IEEE Transactions on Semiconductor Manufacturing
Yanzhen Wang
Yoong Yong
Bingwu Liu
Dibao Zhou
Mitsuhiro Togo
Dongil Choi
J. G. Lee
Hsien-Ching Lo
Xinyuan Dou
Sipeng Gu
Shashidhar Shintri
Weihua Tong
Vidmantas Sargunas
Jorge Argandona
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Citations (3)
Successful void free gap fill of 3µm, high AR via middle, Through Silicon Vias at wafer level
2014
ASMC | Advanced Semiconductor Manufacturing Conference
Sarasvathi Thangaraju
Luke England
Mohamed A. Rabie
Dingyou Zhang
G. Kumarapuram
R. McGowan
A. Selsley
Rudy R. Giridharan
Sipeng Gu
Vijayalakshmi Seshachalam
C. Wang
Shinichiro Kakita
S. Baral
Wonwoo Kim
Holly M. Edmundson
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Citations (9)
Process monitoring using advanced inspection methodologies - a study with CVD
2014
ASMC | Advanced Semiconductor Manufacturing Conference
Sandeep Gaan
Zhiguo Sun
Sipeng Gu
Y. B. Lee
Chandar Palamadai
Joey Li
Lingyan Zhao
Lucy Fan
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